The disclosure relates generally to memory management unit in computer hardware, and more specifically, to performance optimized congruence class (CC) matching for multiple concurrent radix translations.
In general, when allowing a memory management unit in computer hardware to have more than one table walk state machine, it is possible that two concurrent translations that want to write to a translation lookaside buffer (TLB) are doing the same translation. As these two concurrent translations continue to write the TLB, the respective table walk state machine can create a multi-hit in a TLB CC, which is not acceptable. Therefore, the memory management unit has a need to check that one of the table walk state machines does not start if it is at all possible the another table walk state machine might be doing the same translation.